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| STB85NF3LL N-CHANNEL 30V - 0.006 - 85A D2PAK LOW GATE CHARGE STripFETTMII POWER MOSFET TYPE STB85NF3LL s s s s s VDSS 30 V RDS(on) < 0.008 ID 85 A TYPICAL RDS(on) = 0.0075 (@4.5V) OPTIMAL RDS(on) x Qg TRADE-OFF @4.5V CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED ADD SUFFIX "T4" FOR ORDERING IN TAPE & REEL 3 1 D2PAK DESCRIPTION This application specific Power MOSFET is the third genaration of STMicroelectronics unique " Single Feature Size" strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance. APPLICATIONS s SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY CPU CORE DC/DC CONVERTERS ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS VGSM ID ID IDM (l) PTOT Tstg Tj Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Gate-source Voltage Pulsed (tp50s; duty cycle 25%; Tj 150C) Drain Current (continuos) at TC = 25C Drain Current (continuos) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Storage Temperature Max. Operating Junction Temperature Value 30 30 16 20 85 60 340 110 0.73 -65 to 175 175 Unit V V V V A A A W W/C C C INTERNAL SCHEMATIC DIAGRAM (q) Pulse width limited by safe operating area November 2001 1/9 STB85NF3LL THERMAL DATA Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Maximum Lead Temperature For Soldering Purpose 1.36 62.5 300 C/W C/W C ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 16V Min. 30 1 10 100 Typ. Max. Unit V A A nA ON (1) Symbol VGS(th) RDS(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance Test Conditions VDS = VGS, ID = 250A VGS = 10V, ID = 40 A VGS = 4.5V, ID = 40 A Min. 1 0.006 0.0075 0.008 0.0095 Typ. Max. Unit V DYNAMIC Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID = 40 A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 30 2210 635 138 Max. Unit S pF pF pF 2/9 STB85NF3LL ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 15V, ID = 30A RG = 4.7 VGS = 4.5V (see test circuit, Figure 3) VDD = 24V, ID = 60A, VGS = 4.5V Min. Typ. 22 130 30 9 12.5 40 Max. Unit ns ns nC nC nC SWITCHING OFF Symbol td(off) tf td(off) tf tc Parameter Turn-off-Delay Time Fall Time Off-voltage Rise Time Fall Time Cross-over Time Test Conditions VDD = 15V, ID = 30A, RG = 4.7, VGS = 4.5V (see test circuit, Figure 3) Vclamp =24V, ID =30A RG = 4.7, VGS = 4.5V (see test circuit, Figure 5) Min. Typ. 36.5 36.5 32 23 40 Max. Unit ns ns ns ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (2) VSD (1) trr Qrr IRRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 85A, VGS = 0 ISD = 85A, di/dt = 100A/s, VDD = 15V, Tj = 150C (see test circuit, Figure 5) 65 105 3.4 Test Conditions Min. Typ. Max. 85 340 1.3 Unit A A V ns nC A Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedence 3/9 STB85NF3LL Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/9 STB85NF3LL Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STB85NF3LL Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STB85NF3LL D2PAK MECHANICAL DATA mm. DIM. MIN. A A1 A2 B B2 C C2 D D1 E E1 G L L2 L3 M R V2 0 4.88 15 1.27 1.4 2.4 0.4 8 10 8.5 5.28 15.85 1.4 1.75 3.2 0.192 0.590 0.050 0.055 0.094 0.015 4.4 2.49 0.03 0.7 1.14 0.45 1.23 8.95 8 10.4 0.393 0.334 0.208 0.625 0.055 0.068 0.126 TYP MAX. 4.6 2.69 0.23 0.93 1.7 0.6 1.36 9.35 MIN. 0.173 0.098 0.001 0.027 0.044 0.017 0.048 0.352 0.315 TYP. MAX. 0.181 0.106 0.009 0.036 0.067 0.023 0.053 0.368 inch 3 7/9 1 STB85NF3LL D2PAK FOOTPRINT TUBE SHIPMENT (no suffix)* TAPE AND REEL SHIPMENT (suffix "T4")* REEL MECHANICAL DATA DIM. A B C D G N T 1.5 12.8 20.2 24.4 100 30.4 26.4 13.2 mm MIN. MAX. 330 0.059 0.504 0.520 0795 0.960 1.039 3.937 1.197 BULK QTY 1000 inch MIN. MAX. 12.992 TAPE MECHANICAL DATA DIM. A0 B0 D D1 E F K0 P0 P1 P2 R T W 8/9 BASE QTY 1000 mm MIN. 10.5 15.7 1.5 1.59 1.65 11.4 4.8 3.9 11.9 1.9 50 0.25 23.7 24.3 MAX. 10.7 15.9 1.6 1.61 1.85 11.6 5.0 4.1 12.1 2.1 inch MIN. MAX. 0.413 0.421 0.618 0.626 0.059 0.063 0.062 0.063 0.065 0.073 0.449 0.456 0.189 0.197 0.153 0.161 0.468 0.476 0.075 0.082 1.574 0.35 0.0098 0.0137 0.933 0.956 * on sales type STB85NF3LL Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 9/9 |
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